Intel Cyclone 10 GX User Manual

Table 95. Block Sync Parameters
Parameter Range
Enable RX block synchronizer On
Enable rx_enh_blk_lock port On
Off
Table 96. Gearbox Parameters
Parameter Range
Enable TX data polarity inversion On
Off
Enable RX data polarity inversion On
Off
Table 97. Dynamic Reconfiguration Parameters
Parameter Range
Enable dynamic reconfiguration On
Off
Share reconfiguration interface On
Off
Enable Altera Debug Master Endpoint On
Off
De-couple reconfig_waitrequest from calibration On
Off
Table 98. Configuration Files Parameters
Parameter Range
Configuration file prefix —
Generate SystemVerilog package file On
Off
Generate C header file On
Off
Generate MIF (Memory Initialization File) On
Off
Table 99. Generation Options Parameters
Parameter Range
Generate parameter documentation file On
Off
2. Implementing Protocols in Intel Cyclone 10 GX Transceivers
UG-20070 | 2018.09.24
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Intel Cyclone 10 GX Specifications

General

Brand	Intel
Model	Cyclone 10 GX
Category	Transceiver
Language	English