Intel Cyclone 10 GX User Manual

Gen1 PIPE Gen2 PIPE
Gen1 x2: 2 channels
Gen1 x4: 4 channels
Gen2 x2: 2 channels
Gen2 x4: 4 channels
Data rate 2.5 Gbps 5 Gbps
Enable datapath and interface
reconfiguration
Optional Optional
Enable simplified data interface Optional
(22)
Optional
(22)
Provide separate interface for each channel Optional Optional
Table 121. Parameters for Cyclone 10 GX Native PHY IP in PIPE Gen1, Gen2 Modes - TX
PMA
This section contains the recommended parameter values for this protocol. Refer to Using the Cyclone 10 GX
Transceiver Native PHY IP Core for the full range of parameter values.
Gen1 PIPE Gen2 PIPE
TX Bonding Options
TX channel bonding mode
Nonbonded (x1)
PMA & PCS Bonding (x2 and
x4)
Nonbonded (x1)
PMA & PCS Bonding (x2 and x4)
PCS TX channel bonding master Auto
(23)
Auto
(23)
Default PCS TX channel bonding master
Gen1 x1: Channel 0
Gen1 x2: Channel 1
Gen1 x4: Channel 2
Gen1 x1: Channel 0
Gen1 x2: Channel 1
Gen1 x4: Channel 2
TX PLL Options
TX local clock division factor 1 1
Number of TX PLL clock inputs per channel 1 1
Initial TX PLL clock input selection 0 0
TX PMA Optional Ports
Enable tx_analog_reset_ack port
Optional Optional
Enable tx_pma_clkout port
Optional Optional
Enable tx_pma_div_clkout port
Optional Optional
tx_pma_div_clkout division factor
Optional Optional
Enable tx_pma_elecidle port
Off Off
Enable rx_seriallpbken port
Off Off
(22)
Refer to Table 127 on page 143 for bit settings when simplified data interface is enabled.
(23)
Setting this parameter is placement-dependent. In AUTO mode, the Native PHY IP Parameter
Editor will select the middle-most channel of the configuration as the default PCS TX channel
bonding master. You must ensure that this selected channel is physically placed as Ch1 or Ch4
of the transceiver bank. Else, use the manual selection for the PCS TX channel bonding master
to select a channel that can be physically placed as Ch1 or Ch4 of the transceiver bank. Refer
to section How to place channels for PIPE configurations for more details.
2. Implementing Protocols in Intel Cyclone 10 GX Transceivers
UG-20070 | 2018.09.24
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Intel Cyclone 10 GX Specifications

General

Brand	Intel
Model	Cyclone 10 GX
Category	Transceiver
Language	English