Index - 6
13.3.3 A/D converter mode register 1 (ADM1) ............................................................................ 295
13.3.4 A/D converter mode register 2 (ADM2) ............................................................................ 296
13.3.5 10-bit A/D conversion result register (ADCR) ................................................................... 298
13.3.6 8-bit A/D conversion result register (ADCRH) .................................................................. 298
13.3.7 Analog input channel specification register (ADS) ........................................................... 299
13.3.8 Conversion result comparison upper limit setting register (ADUL) ................................... 300
13.3.9 Conversion result comparison lower limit setting register (ADLL) .................................... 300
13.3.10 A/D test register (ADTES) ................................................................................................ 301
13.3.11 Registers controlling port function of analog input pins .................................................... 302
13.4 A/D Converter Conversion Operations ................................................................................. 303
13.5 Input Voltage and Conversion Results .................................................................................. 305
13.6 A/D Converter Operation Modes .......................................................................................... 306
13.6.1 Software trigger mode (select mode, sequential conversion mode) ................................. 306
13.6.2 Software trigger mode (select mode, one-shot conversion mode) ................................... 307
13.6.3 Hardware trigger no-wait mode (select mode, sequential conversion mode) ................... 308
13.6.4 Hardware trigger no-wait mode (select mode, one-shot conversion mode) ..................... 309
13.6.5 Hardware trigger wait mode (select mode, sequential conversion mode) ........................ 310
13.6.6 Hardware trigger wait mode (select mode, one-shot conversion mode) ........................... 311
13.7 A/D Converter Setup Flowchart ............................................................................................ 312
13.7.1 Setting up software trigger mode ...................................................................................... 312
13.7.2 Setting up hardware trigger no-wait mode ........................................................................ 313
13.7.3 Setting up hardware trigger wait mode ............................................................................. 314
13.7.4 Setting up test mode ......................................................................................................... 315
13.8 SNOOZE Mode Function ...................................................................................................... 316
13.9 Cautions for A/D Converter .................................................................................................. 319
14. SERIAL ARRAY UNIT ................................................................................................................ 323
14.1 Functions of Serial Array Unit ............................................................................................... 324
14.1.1 3-wire serial I/O (CSIp) ..................................................................................................... 324
14.1.2 UART (UARTq) ................................................................................................................. 325
14.2 Configuration of Serial Array Unit ......................................................................................... 326
14.2.1 Shift register ..................................................................................................................... 329
14.2.2 Lower 8 bits of the serial data register mn (SDRmn) ........................................................ 329
14.3 Registers Controlling Serial Array Unit ................................................................................. 331
14.3.1 Peripheral enable register 0 (PER0) ................................................................................. 332
14.3.2 Serial clock select register m (SPSm) .............................................................................. 333
14.3.3 Serial mode register mn (SMRmn) ................................................................................... 335
14.3.4 Serial communication operation setting register mn (SCRmn) ......................................... 336
14.3.5 Serial data register mn (SDRmn) ..................................................................................... 339
14.3.6 Serial flag clear trigger register mn (SIRmn) .................................................................... 340
14.3.7 Serial status register mn (SSRmn) ................................................................................... 341
14.3.8 Serial channel start register m (SSm) ............................................................................... 343
14.3.9 Serial channel stop register m (STm) ............................................................................... 344
14.3.10 Serial channel enable status register m (SEm) ................................................................ 345
14.3.11 Serial output enable register m (SOEm) ........................................................................... 346
14.3.12 Serial output register m (SOm) ......................................................................................... 347
14.3.13 Serial output level register m (SOLm) .............................................................................. 348
14.3.14 Noise filter enable register 0 (NFEN0) .............................................................................. 350
14.3.15 Registers controlling port functions of serial input/output pins ......................................... 351
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