Renesas RL78/G1H User Manual

RL78/G1H CHAPTER 14 SERIAL ARRAY UNIT
R01UH0575EJ0120 Rev. 1.20 Page 407 of 920
Dec 22, 2016
(1) Register setting
Figure 14 - 71 Example of Contents of Registers for UART Transmission of UART (UARTq) (1/2)
(a) Serial mode register mn (SMRmn)
(b) Serial communication operation setting register mn (SCRmn)
(c) Serial data register mn (SDRmn) (lower 8 bits: TXDq)
(d) Serial output level register m (SOLm)... Sets only the bits of the target channel.
Remark 1. m: Unit number (m = 0, 1) n: Channel number(n = 2) mn = 02, 12 q:UART number(q = 1, 3)
Remark 2. : Setting is fixed in the UART transmission mode,
: Setting disabled (set to the initial value)
×: Bit that cannot be used in this mode (set to the initial value when not used in any mode)
0/1: Set to 0 or 1 depending on the usage of the user
1514131211109876543210
SMRmn
CKSmn
0/1
CCSmn
0 0 0 0 0 0 0 0 0 1 0 0 0
MDmn1
1
MDmn0
0/1
Operation clock (fMCK) of channel n
0: Prescaler output clock CKm0 set by the SPSm register
1: Prescaler output clock CKm1 set by the SPSm register
Interrupt source of channel n
0: Transfer end interrupt
1: Buffer empty interrupt
1514131211109876543210
SCRmn
TXEmn
1
RXEmn
0
DAPmn
0
CKPmn
0
0
EOCmn
0
PTCmn1
0/1
PTCmn0
0/1
DIRmn
0/1 0
SLCmn1
0/1
SLCmn0
0/1 0 1
1
DLSmn0
0/1
Setting of parity bit
00B: No parity
01B: Appending 0 parity
10B: Appending Even parity
11B: Appending Odd parity
Setting of stop bit
01B: Appending 1 bit
10B: Appending 2 bits
Selection of data transfer
sequence
0: Inputs/outputs data with MSB first
1: Inputs/outputs data with LSB first
1514131211109876543210
SDRmn Baud rate setting
0
Transmit data setting
TXDq
1514131211109876543210
SOLm
0 0 0 0 0 0 0 0 0 0 0 0 0
SOLm2
0/1 0
SOLm0
0/1
0: Non-reverse (normal) transmission
1: Reverse transmission

Renesas RL78/G1H Specifications

General

Brand	Renesas
Model	RL78/G1H
Category	Microcontrollers
Language	English