Renesas RL78/G1H User Manual

RL78/G1H CHAPTER 16 DATA TRANSFER CONTROLLER (DTC)
R01UH0575EJ0120 Rev. 1.20 Page 521 of 920
Dec 22, 2016
Table 16 - 5 DTC Activation Sources and Vector Addresses
DTC Activation Sources (Interrupt Request Source)
Source
No.
Vector Address Priority
Reserved
0
Address set in DTCBAR register +00H Highest
INTP0
1
Address set in DTCBAR register +01H
Reserved
2
Address set in DTCBAR register +02H
Reserved
3
Address set in DTCBAR register +03H
INTP3
4
Address set in DTCBAR register +04H
INTP4
5
Address set in DTCBAR register +05H
Reserved
6
Address set in DTCBAR register +06H
INTP6
7
Address set in DTCBAR register +07H
INTP7
8
Address set in DTCBAR register +08H
Reserved
9
Address set in DTCBAR register +09H
A/D conversion end
10
Address set in DTCBAR register +0AH
Reserved
11
Address set in DTCBAR register +0BH
Reserved
12
Address set in DTCBAR register +0CH
UART1 reception transfer end
13
Address set in DTCBAR register +0DH
UART1 transmission transfer end/CSI10 transfer end or buffer empty
14
Address set in DTCBAR register +0EH
CSI21 transfer end or buffer empty
15
Address set in DTCBAR register +0FH
CSI20 transfer end or buffer empty
16
Address set in DTCBAR register +10H
UART3 reception transfer end
17
Address set in DTCBAR register +11H
UART3 transmission transfer end/CSI30 transfer end or buffer empty/
18
Address set in DTCBAR register +12H
End of channel 0 of timer array unit 0 count or capture
19
Address set in DTCBAR register +13H
End of channel 1 of timer array unit 0 count or capture
20
Address set in DTCBAR register +14H
End of channel 2 of timer array unit 0 count or capture
21
Address set in DTCBAR register +15H
End of channel 3 of timer array unit 0 count or capture
22
Address set in DTCBAR register +16H
End of channel 0 of timer array unit 1 count or capture
23
Address set in DTCBAR register +17H
End of channel 1 of timer array unit 1 count or capture
24
Address set in DTCBAR register +18H
End of channel 2 of timer array unit 1 count or capture
25
Address set in DTCBAR register +19H
End of channel 3 of timer array unit 1 count or capture
26
Address set in DTCBAR register +1AH
Reserved
27
Address set in DTCBAR register +1BH
Reserved
28
Address set in DTCBAR register +1CH
Reserved
29
Address set in DTCBAR register +1DH
Reserved
30
Address set in DTCBAR register +1EH
Reserved
31
Address set in DTCBAR register +1FH
Reserved
32
Address set in DTCBAR register +20H
Reserved
33
Address set in DTCBAR register +21H
Reserved
34
Address set in DTCBAR register +22H
Reserved
35
Address set in DTCBAR register +23H
Reserved
36
Address set in DTCBAR register +24H
Timer RJ0 underflow
37
Address set in DTCBAR register +25H
Reserved
38
Address set in DTCBAR register +26H
Reserved
39
Address set in DTCBAR register +27H Lowest

Renesas RL78/G1H Specifications

General

Brand	Renesas
Model	RL78/G1H
Category	Microcontrollers
Language	English