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Renesas RL78/G1H

Renesas RL78/G1H
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RL78/G1H CHAPTER 18 RF TRANSCEIVER
R01UH0575EJ0120 Rev. 1.20 Page 576 of 920
Dec 22, 2016
(10) Transmit/receive status register 1 (BBTXRXST1)
The receive data save bank pointer bit can be used to check the bank which stores the data, for example
frame length of the received frame. It indicates 1 after reset or initialization.
The BBTXRXST1 register is read by the serial interface in 8-bit units.
Reset signal generation clears this register to 02H.
Figure 18 - 16 Transmit/Receive Status Register 1 (BBTXRXST1) Format
Caution “0“ is always read for bits 2 to 7.
Bit 0 is read as x (undefined).
Address:
000BH
After reset:
02H
R
Symbol76543210
BBTXRXS
T1
000000RCVSTORES
T
X
RCVSTORES
T
Receive data save bank pointer bit
0 Receive data save bank 0
1 Receive data save bank 1

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