RL78/G1H CHAPTER 18 RF TRANSCEIVER
R01UH0575EJ0120 Rev. 1.20 Page 591 of 920
Dec 22, 2016
Figure 18 - 33 Timer Control Register (BBTIMECON) Format
Caution Be sure to clear bit 7 to “0”.
Address:
0034H
After reset: 00H R/W
Symbol76543210
BBTIMEC
ON
0 CNTSRCSEL STAMPRDSE
L1
STAMPRDSE
L0
COMP0TRGS
EL
STAMPTIMS
EL
COMP0TRG TIMEEN
CNTSRCSE
L
Count source switch bit
0 Prescaler output (1 μs)
1Data rate
STAMPRDS
EL1
STAMPRDS
EL0
Stamp value read switch bit
0 0 Receive start stamp value
0 1 Receive completion stamp value
1 0 Transmit completion stamp value
11
COMP0TRG
SEL
COMP0 trigger function select bit
0 Transmit trigger
1 CSMA-CA trigger
STAMPTIMS
EL
Stamp timing switch bit
0 Upon receive start
1 Upon interrupt of receive FL
COMP0TRG COMP0 transmit trigger enable bit
0 Transmit trigger disabled
1 Transmit trigger enabled
TIMEEN Timer count enable bit
0 Timer count stop
1 Timer count enable
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