Renesas RL78/G1H

RL78/G1H CHAPTER 18 RF TRANSCEIVER
R01UH0575EJ0120 Rev. 1.20 Page 633 of 920
Dec 22, 2016
(70) Number-of-receive-byte interrupt compare register (BBRCVINTCOMP)
This register is used to generate interrupt depending on the number of received bytes. Generates the
interrupt request when receiving the specified number of bytes.
The BBRCVINTCOMP register is set via serial interface in 8-bit units.
Reset signal generation sets this register to 0010H.
Figure 18 - 83 Number-of-Receive-Byte Interrupt Compare Register (BBRCVINTCOMP) Format
(71) Back off period total number register (BBBOPTOTAL)
This register is used to indicate the total number of count values of the back off period upon CSMA-CA. The
maximum value of the count value is FFFFH.
BBBOPTOTAL register is set via serial interface in 8-bit units.
Reset signal generation clears this register to 0000H.
Figure 18 - 84 Back off Period Total Number Register (BBBOPTOTAL) Format
Address:
00D3H, 00D2H
After reset:
0010H
R/W
Symbol 15 14 13 12 11 10 9 8
BBRCVIN
TCOMP
RCVINTCOMP10 RCVINTCOMP9 RCVINTCOMP8
76543210
RCVINTCOMP7 RCVINTCOMP6 RCVINTCOMP5 RCVINTCOMP4 RCVINTCOMP3 RCVINTCOMP2 RCVINTCOMP1 RCVINTCOMP0
RCVINTCOMP[10:0] Number of bytes which generate the number-of-receive-byte interrupt
Address:
00D5H, 00D4H
After reset:
0000H
R
Symbol 15 14 13 12 11 10 9 8
BBBOPTO
TAL
76543210
BBBOPTOTAL Back off period total number