Sel 751A - Block Reset Timing Setting (79 BRS); Figure 4.36 Reclose Blocking for Islanded Generator

4.71
Date Code 20100129 Instruction Manual SEL-751A Relay
Protection and Logic Functions
Reclose Logic
Figure 4.36 Reclose Blocking for Islanded Generator
If the line is energized, channel VS overvoltage element 59S1 can be
set to assert. Make the following setting:
79STL := 59S1 OR ...
If line voltage is present, Relay Word bit 59S1 asserts, stalling open
interval timing (reclose block). If line voltage is not present, Relay
Word bit 59S1 deasserts, allowing open interval timing to proceed
(unless some other set condition stalls open interval timing).
EXAMPLE 4.14 Additional Settings Example 3
Refer to Figure 4.33 and accompanying setting example, showing an
application for setting 79STL.
Other Settings Considerations
If no special skip shot or stall open interval timing conditions are desired,
make the following settings:
79SKP := 0 (numeral 0)
79STL := 0 (numeral 0)
Block Reset Timing
Setting (79BRS)
The block reset timing setting 79BRS keeps the reset timer from timing.
Depending on the reclosing relay state, the reset timer can be loaded with
either reset time:
79RSD (Reset Time from Reclose Cycle)
or
79RSLD (Reset Time from Lockout)
Depending on how setting 79BRS is set, none, one, or both of these reset
times can be controlled. If the reset timer is timing and then 79BRS asserts to:
79BRS = logical 1
reset timing is stopped and does not begin timing again until 79BRS deasserts
to:
79BRS = logical 0
When reset timing starts again, the reset timer is fully loaded. Thus, successful
reset timing has to be continuous. Use the RSTMN Relay Word bit to monitor
reset timing (see Monitoring Open Interval and Reset Timing on page 4.65).
SEL-751A
Bus 1
52
IA, IB, IC
VA, VB, VC
VS
3-Phase
1-Phase
Generator