Intel Xeon User Manual

EMI and Mechanical Design Considerations
150 Design Guide
11.1.2 EMI Regulations and Certifications
Original Equipment Manufacturers (OEMs) ensure EMC compliance by meeting EMI regulatory
requirements. System designers must ensure that their computer systems do not exceed the
emission limit standards set by applicable regulatory agencies. Regulatory requirements referenced
in this document include:
• United States Federal Communication Commission (FCC) Part 15 Class B.
• International Electrotechnical Commission's International Special Committee on Radio
Interference (CISPR) Publication 22 Class B limits.
The FCC rules require any OEM that sells an “off-the-shelf” motherboard in the United States to
pass an open chassis test. Open chassis testing is defined as removing the chassis cover (or top and
2 sides), and testing for EMI compliance (although permitted emission levels are allowed to be
higher). Removing the cover greatly reduces the shielding provided by the chassis and increases
the amount of EMI radiation. The purpose of this regulation is to ensure that system boards have
reasonable emission levels since they are one of the main contributors to EMI.
11.2 EMI Design Considerations
The following sections describe design techniques that may be applied to minimize EMI emissions.
Some techniques have been incorporated into Intel-enabled designs (differential clock drivers,
selective clock gating, etc.), and some must be implemented by motherboard designers (trace
routing, clocking schemes, etc.).
11.2.1 Spread Spectrum Clocking (SSC)
Spread Spectrum Clocking is defined as continuously ramping (or modulating) the processor clock
frequency over a predefined range (see Figure 11-1). SSC reduces radiated emissions by spreading
the radiated energy over a wider frequency band (see Figure 11-2). Thus, instead of maintaining a
constant system frequency, SSC modulates the clock frequency along a predetermined path (or
modulating profile). Figure 11-1 shows an example of a predetermined modulation frequency. The
modulation frequency is usually selected to be larger than 30 kHz (above the audio band), and
small enough not to upset system timings (less than 0.8% of the clock frequency). SSC has been
demonstrated to effectively reduce peak radiation levels, making EMC compliance easier to
achieve.
To conserve the minimum period requirement for bus timing, the SSC clock is modulated between
fnom and (1-δ)*fnom, where fnom is the nominal frequency for a constant frequency clock.
The“δ” specifies the total amount of spreading as a relative percentage of fnom. The modulation
percentage is always a function of 1-δ and not 1+δ, as increasing the clock frequency above the
rated speed of the processor may cause unpredictable operation.

Intel Xeon Specifications

General

Brand	Intel
Model	Xeon
Category	Processor
Language	English