Design Guide 81
Memory Interface Routing Guidelines
6.10 DDR Signal Termination
Place a 1.25 V termination plane on the top layer just beyond the DIMM connector furthest from
the MCH on each channel, as shown in Figure 6-18. The VTERM island must be at least 50 mils
wide. Use this termination plane to terminate all DIMM signals, using one 22 Ω ± 2% resistor per
signal. Decouple the VTERM plane using one 0.1 µF decoupling capacitor per two termination
resistors. In addition, place one 100 µF Tantalum capacitor on each end of each termination island
for bulk decoupling. Each decoupling capacitor must have at least 2 vias between the top layer
ground fill, and the internal ground plane. Refer to Figure 6-18.
Figure 6-18. DDR VTerm Plane
One 100 µF Tantalum
Capacitor at Each End
of Each Island
DIMM8 (Furthest from MCH)
1.25V Vterm Fill
One Rtt per signal
One 0.1 µF Decoupling
Capacitor per 2 Termination
Resistors or (2 Caps/Rpack)
DIMM to Rtt
(0.8" max)
Two Vias Per 1 Capacitor
to the Internal Ground
Plane
Ground Fill on
Top Layer
DIMM7
DIMM6
50 mils
minimum
50 mils
minimum
One 0.1 µF
decoupling
capactior per 2
termination
resistors
Ground Fill
on Top Layer
1.25V
Vterm Fill
Two Vias Per 1
Capacitor to the
Internal Ground
Plane