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Microchip Technology dsPIC30F
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dsPIC30F Family Reference Manual
DS70052C-page 5-4 © 2004 Microchip Technology Inc.
5.2.2 Using Table Write Instructions
The effect of a table write instruction will depend on the type of memory technology that is present
in the device program memory address space. The program memory address space could
contain volatile or non-volatile program memory, non-volatile data memory, and an External Bus
Interface (EBI). If a table write instruction occurs within the EBI address region, for example, the
write data will be placed onto the EBI data lines.
5.2.2.1 Table Write Holding Latches
Table write instructions do not write directly to the non-volatile program and data memory.
Instead, the table write instructions load holding latches that store the write data. The holding
latches are not memory mapped and can only be accessed using table write instructions. When
all of the holding latches have been loaded, the actual memory programming operation is started
by executing a special sequence of instructions.
The number of holding latches will determine the maximum memory block size that can be
programmed and may vary depending on the type of non-volatile memory and the device variant.
For example, the number of holding latches could be different for program memory, data
EEPROM memory and Device Configuration registers for a given device.
In general, the program memory is segmented into rows and panels. Each panel will have its own
set of table write holding latches. This allows multiple memory panels to be programmed at once,
reducing the overall programming time for the device. For each memory panel, there are
generally enough holding latches to program one row of memory at a time. The memory logic
automatically decides which set of write latches to load based on the address value used in the
table write instruction.
Please refer to the specific device data sheet for further details.
5.2.2.2 Write Word Mode
The following sequence can be used to write a single program memory latch location in Word
mode:
; Setup the address pointer to program space
MOV #tblpage(PROG_ADDR),W0 ; get table page value
MOV W0,TBLPAG ; load TBLPAG register
MOV #tbloffset(PROG_ADDR),W0 ; load address LS word
; Load write data into W registers
MOV #PROG_LOW_WORD,W2
MOV #PROG_HI_BYTE,W3
; Perform the table writes to load the latch
TBLWTL W2
,
[W0]
TBLWTH W3
,
[W0++]
In this example, the contents of the upper byte of W3 does not matter because this data will be
written to the phantom byte location. W0 is post-incremented by 2, after the second TBLWTH
instruction, to prepare for the write to the next program memory location.

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