dsPIC30F Family Reference Manual
DS70064C-page 17-16 © 2004 Microchip Technology Inc.
17.8.3 Channel 1, 2 and 3 Input Selection
Channel 1, 2 and 3 can sample a subset of the analog input pins. Channel 1, 2 and 3 may select
one of two groups of 3 inputs.
The CHXSA bit (ADCHS<5>) selects the source for the positive inputs of channel 1, 2 and 3.
Clearing CHXSA selects AN0, AN1 and AN2 as the analog source to the positive inputs of
channel 1, 2 and 3, respectively. Setting CHXSA selects AN3, AN4 and AN5 as the analog
source.
The CHXNA<1:0> bits (ADCHS<7:6>) select the source for the negative inputs of channel 1, 2
and 3.
Programming CHXNA = 0x, selects V
REF- as the analog source for the negative inputs of
channel 1, 2 and 3. Programming CHXNA = 10 selects AN6, AN7 and AN8 as the analog source
to the negative inputs of channel 1, 2 and 3 respectively. Programming CHXNA = 11 selects AN9,
AN10 and AN11 as the analog source.
17.8.3.1 Specifying Alternating Channel 1, 2 and 3 Input Selections
As with the channel 0 inputs, the ALTS bit (ADCON2<0>) causes the module to alternate
between two sets of inputs that are selected during successive samples for channel 1,2 and 3.
The MUX A inputs specified by CHXSA and CHXNA<1:0> always select the input when
ALTS = 0.
The MUX A inputs alternate with the MUX B inputs specified by CHXSB and CHXNB<1:0> when
ALTS = 1.
17.9 Enabling the Module
When the ADON bit (ADCON1<15>) is ‘1’, the module is in Active mode and is fully powered and
functional.
When ADON is ‘0’, the module is disabled. The digital and analog portions of the circuit are
turned off for maximum current savings.
In order to return to the Active mode from the Off mode, the user must wait for the analog stages
to stabilize. For the stabilization time, refer to the Electrical Characteristics section of the device
data sheet.
17.10 Specifying the Sample/Conversion Sequence
The 10-bit A/D module has 4 sample/hold amplifiers and one A/D converter. The module may
perform 1, 2 or 4 input samples and A/D conversions per sample/convert sequence.
17.10.1 Number of Sample/Hold Channels
The CHPS<1:0> control bits (ADCON2<9:8>) are used to select how many S/H amplifers are
used by the A/D module during sample/conversion sequences. The following three options may
be selected:
• CH0 only
• CH0 and CH1
• CH0, CH1, CH2, CH3
The CHPS control bits work in conjunction with the SIMSAM (simultaneous sample) control bit
(ADCON1<3>).
Note: The SSRC<2:0>, SIMSAM, ASAM, CHPS<1:0>, SMPI<3:0>, BUFM and ALTS bits,
as well as the ADCON3 and ADCSSL registers, should not be written to while
ADON = 1. This would lead to indeterminate results.
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