© 2004 Microchip Technology Inc. DS70054C-page 7-13
Section 7. Oscillator
Oscillator
7
The OSC2 signal should be a clean sine wave that easily spans the input minimum and maximum
of the clock input pin (4V to 5V peak to peak for a 5V V
DD is usually good). An easy way to set
this is to again test the circuit at the minimum temperature and maximum V
DD that the design will
be expected to perform in, then look at the output. This should be the maximum amplitude of the
clock output. If there is clipping or the sine wave is distorted near V
DD and VSS, increasing load
capacitors may cause too much current to flow through the crystal or push the value too far from
the manufacturer’s load specification. To adjust the crystal current, add a trimmer potentiometer
between the crystal inverter output pin and C2 and adjust it until the sine wave is clean. The
crystal will experience the highest drive currents at the low temperature and high V
DD extremes.
The trimmer potentiometer should be adjusted at these limits to prevent overdriving. A series
resistor, Rs, of the closest standard value can now be inserted in place of the trimpot. If Rs is too
high, perhaps more than 20 kOhms, the input will be too isolated from the output, making the
clock more susceptible to noise. If you find a value this high is needed to prevent overdriving the
crystal, try increasing C2 to compensate or changing the Oscillator Operating mode. Try to get a
combination where Rs is around 10k or less and load capacitance is not too far from the
manufacturer specification.
7.8 External Clock Input
Two of the Primary Oscillator modes use an external clock. These modes are EC and ECIO.
In the EC mode (Figure 7-5), the OSC1 pin can be driven by CMOS drivers. In this mode, the
OSC1 pin is hi-impedance and the OSC2 pin is the clock output (F
OSC/4). This output clock is
useful for testing or synchronization purposes.
Figure 7-5: External Clock Input Operation (EC Oscillator Configuration)
In the ECIO mode (Figure 7-6), the OSC1 pin can be driven by CMOS drivers. In this mode, the
OSC1 pin is hi-impedance and the OSC2 pin becomes a general purpose I/O pin. The feedback
device between OSC1 and OSC2 is turned off to save current.
Figure 7-6: External Clock Input Operation (ECIO Oscillator Configuration)
OSC1
OSC2
F
OSC/4
Clock from
Ext. System
dsPIC30F
OSC1
I/O (OSC2)
I/O
Clock from
Ext. System
dsPIC30F
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