© 2004 Microchip Technology Inc. DS70062C-page 15-3
Section 15. Motor Control PWM
Motor Control
PWM
15
Figure 15-1: MCPWM Block Diagram
PWM1 duty cycle register
PDC1
PWMCON1
PTPER
PWMCON2
PTMR period register
PTMR
Comparator
Comparator
Channel 1
Generator and
SEVTCMP
Comparator
Special Event Trigger for A/D converter
FLTBCON
OVDCON
PWM enable and mode SFRs
PWM manual control
PWM Generator
#2
PWM Generator
#3
PWM Generator #1
DTCON1
Dead time control SFRs
Special Event
Postscaler
FLTA
PWM4L
PWM4H
PWM3L
PWM3H
PWM2L
PWM2H
PWM Generator
#4
FLTB
Note 1: Details of PWM Generator #2, #3 and #4 not shown for clarity.
2: Logic within dashed lines not present on 6-output MCPWM module.
16-bit data bus
PWM1L
PWM1H
DTCON2
FLTACON
Fault pin control SFRs
Dead Time
Override Logic
Channel 2
Generator and
Dead Time
Override Logic
Channel 3
Generator and
Dead Time
Override Logic
Channel 4
Generator and
Dead Time
Override Logic
PTCON
PWM time base control