© 2004 Microchip Technology Inc. DS70070B-page 23-65
Section 23. CAN
CAN Module
23
23.10.2 The ICODE Bits
The ICODE<2:0> bits (CiCTRL<3:1>) are a set of read only bits designed for efficient handling
of interrupts via a jump table. The ICODE<2:0> bits can only display one interrupt at a time
because the interrupt bits are multiplexed into this register. Therefore, the pending interrupt with
the highest priority and enabled interrupt is reflected in the ICODE<2:0> bits. Once the highest
priority interrupt flag has been cleared, the next highest priority interrupt code is reflected in the
ICODE<2:0> bits. An interrupt code for a corresponding interrupt can only be displayed if both
its interrupt flag and interrupt enable are set. Table 23-6 describes the operation of the
ICODE<2:0> bits.
Table 23-6: ICODE Bits Decode Table
23.11 Time-stamping
The CAN module will generate a signal that can be sent to a timer capture input whenever a valid
frame has been accepted. Because the CAN specification defines a frame to be valid if no errors
occurred before the EOF field has been transmitted successfully, the timer signal will be
generated right after the EOF. A pulse of one bit time is generated.
Time-stamping is enabled by the TSTAMP control bit (CiCTRL<15>). The capture input that is
used for time-stamping depends on the device variant. Refer to the specific device data sheet for
more information.
23.12 CAN Module I/O
The CAN bus module communicates on up to 2 I/O pins. There is 1 transmit pin and 1 receive
pin. These pins are multiplexed with normal digital I/O functions of the device.
When the module is in the Configuration mode, Module Disable mode or Loopback mode, the
I/O pins revert to the PORT I/O function.
When the module is active, the CiTX pin (i = 1 or 2) is always dedicated to the CAN output
function. The TRIS bits associated with the transmit pins are overridden by the CAN bus modes.
The module receives the CAN input on the CiRX input pin.
ICODE<2:0> Boolean Expression
000 ERR
•WAK•TX0•TX1•TX2•RX0•RX1
001 ERR
100 ERR
•TX0
011 ERR
•TX0•TX1
010 ERR
•TX0•TX1•TX2
110 ERR
•TX0•TX1•TX2•RX0
101 ERR
•TX0•TX1•TX2•RX0•RX1
111 ERR
•TX0•TX1•TX2•RX0•RX1•WAK
Legend: ERR = ERRIF • ERRIE
TX0 = TX0IF • TX0IE
TX1 = TX1IF • TX1IE
TX2 = TX2IF • TX2IE
RX0 = RX0IF • RX0IE
RX1 = RX1IF • RX1IE
WAK = WAKIF • WAKIE
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