Microchip Technology dsPIC30F - Modes of Operation

dsPIC30F Family Reference Manual
DS70061C-page 14-4 © 2004 Microchip Technology Inc.
14.3 Modes of Operation
Each output compare module has the following modes of operation:
• Single Compare Match mode
• Dual Compare Match mode generating
- Single Output Pulse
- Continuous Output Pulses
• Simple Pulse Width Modulation mode
- with Fault Protection Input
- without Fault Protection Input
14.3.1 Single Compare Match Mode
When control bits OCM<2:0> (OCxCON<2:0>) are set to ‘001’, ‘010’ or ‘011’, the selected
output compare channel is configured for one of three Single Output Compare Match modes.
In the Single Compare mode, the OCxR register is loaded with a value and is compared to the
selected incrementing timer register, TMRy. On a compare match event, one of the following
events will take place:
• Compare forces OCx pin high, initial state of pin is low. Interrupt is generated on the single
compare match event.
• Compare forces OCx pin low, initial state of pin is high. Interrupt is generated on the single
compare match event.
• Compare toggles OCx pin. Toggle event is continuous and an interrupt is generated for
each toggle event.
Note 1: It is recommended that the user turn off the output compare module (i.e., clear
OCM<2:0> (OCxCON<2:0>)) before switching to a new mode.
2: In this section, a reference to any SFRs associated with the selected timer source
is indicated by a ‘y’ suffix. For example, PRy is the Period register for the selected
timer source, while TyCON is the Timer Control register for the selected timer
source.