© 2004 Microchip Technology Inc. DS70065C-page 18-19
Section 18. 12-bit A/D Converter
12-bit A/D
Converter
18
18.12 Controlling Sample/Conversion Operation
The application software may poll the SAMP and CONV bits to keep track of the A/D operations,
or the module can interrupt the CPU when conversions are complete. The application software
may also abort A/D operations if necessary.
18.12.1 Monitoring Sample/Conversion Status
The SAMP (ADCON1<1>) and CONV (ADCON1<0>) bits indicate the sampling state and the
conversion state of the A/D, respectively. Generally, when the SAMP bit clears indicating end of
sampling, the CONV bit is automatically set indicating start of conversion. If both SAMP and
CONV are ‘0’, the A/D is in an inactive state. In some Operational modes, the SAMP bit may also
invoke and terminate sampling and the CONV bit may terminate conversion.
18.12.2 Generating an A/D Interrupt
The SMPI<3:0> bits control the generation of interrupts. The interrupt will occur some number of
sample/conversion sequences after starting sampling and re-occur on each equivalent number
of samples.
The value specified by the SMPI bits will correspond to the number of data samples in the buffer,
up to the maximum of 16.
Disabling the A/D interrupt is not done with the SMPI bits. To disable the interrupt, clear the ADIE
analog module interrupt enable bit.
18.12.3 Aborting Sampling
Clearing the SAMP bit while in Manual Sampling mode will terminate sampling, but may also start
a conversion if SSRC = 000.
Clearing the ASAM bit while in Automatic Sampling mode will not terminate an on going
sample/convert sequence, however, sampling will not automatically resume after a subsequent
conversion.
18.12.4 Aborting a Conversion
Clearing the ADON bit during a conversion will abort the current conversion. The A/D Result
register pair will NOT be updated with the partially completed A/D conversion sample. That is,
the corresponding ADCBUF buffer location will continue to contain the value of the last
completed conversion (or the last value written to the buffer).
18.13 Specifying How Conversion Results are Written into the Buffer
As conversions are completed, the module writes the results of the conversions into the A/D
result buffer. This buffer is a RAM array of sixteen 12-bit words. The buffer is accessed through
16 address locations within the SFR space, named ADCBUF0...ADCBUFF.
User software may attempt to read each A/D conversion result as it is generated, however, this
might consume too much CPU time. Generally, to simplify the code, the module will fill the buffer
with results and then generate an interrupt when the buffer is filled.
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