Microchip Technology dsPIC30F - Loop Constructs

dsPIC30F Family Reference Manual
DS70049C-page 2-30 © 2004 Microchip Technology Inc.
2.9 Loop Constructs
The dsPIC30F supports both REPEAT and DO instruction constructs to provide unconditional
automatic program loop control. The REPEAT instruction is used to implement a single instruction
program loop. The DO instruction is used to implement a multiple instruction program loop. Both
instructions use control bits within the CPU Status register, SR, to temporarily modify CPU
operation.
2.9.1 Repeat Loop Construct
The REPEAT instruction causes the instruction that follows it to be repeated a number of times.
A literal value contained in the instruction or a value in one of the W registers can be used to
specify the repeat count value. The W register option enables the loop count to be a software
variable.
An instruction in a REPEAT loop will be executed at least once. The number of iterations for a
repeat loop will be the 14-bit literal value + 1, or Wn + 1.
The syntax for the two forms of the REPEAT instruction is given below:
REPEAT #lit14 ; RCOUNT <-- lit14
(Valid target Instruction)
or
REPEAT Wn ; RCOUNT <-- Wn
(Valid target Instruction)
2.9.1.1 Repeat Operation
The loop count for Repeat operations is held in the 14-bit RCOUNT register, which is memory
mapped. RCOUNT is initialized by the REPEAT instruction. The REPEAT instruction sets the
Repeat Active, or RA (SR<4>) status bit to ‘1’, if the RCOUNT is a non-zero value.
RA is a read only bit and cannot be modified through software. For repeat loop count values
greater than ‘0’, the PC is not incremented. Further PC increments are inhibited until
RCOUNT = 0. See Figure 2-20 for an instruction flow example of a Repeat loop.
For a loop count value equal to ‘0’, REPEAT has the effect of a NOP and the RA (SR<4>) bit is not
set. The Repeat loop is essentially disabled before it begins, allowing the target instruction to
execute only once while pre-fetching the subsequent instruction (i.e., normal execution flow).
Figure 2-20: REPEAT Instruction Pipeline Flow
Note: The instruction immediately following the REPEAT instruction (i.e., the target
instruction) is always executed at least one time. It is always executed one time
more than the value specified in the 14-bit literal or the W register operand.
TCY0TCY1TCY2TCY3TCY4TCY5
1.REPEAT #0x2 Fetch 1 Execute 1
2.MAC W4*W5,A,[W8]+=2,W4 Fetch 2 Execute 2
No Fetch Execute 2
No Fetch Execute 2
3.BSET PORTA,#3 Fetch 3 Execute 3
PC (at end of instruction) PC PC+2 PC+2 PC+2 PC+4 PC+6
RCOUNT
(at end of instruction)
X210 0 0
RA (at end of instruction) 0110 0 0