dsPIC30F Family Reference Manual
DS70058C-page 11-2 © 2004 Microchip Technology Inc.
11.1 Introduction
This section provides information on the I/O ports for the dsPIC30F family of devices. All of the
device pins (except V
DD, VSS, MCLR, and OSC1/CLKI) are shared between the peripherals and
the general purpose I/O ports.
The general purpose I/O ports allow the dsPIC30F to monitor and control other devices. Most I/O
pins are multiplexed with alternate function(s). The multiplexing will depend on the peripheral
features on the device variant. In general, when a peripheral is functioning, that pin may not be
used as a general purpose I/O pin.
Figure 11-1 shows a block diagram of a typical I/O port. This block diagram does not take into
account peripheral functions that may be multiplexed onto the I/O pin.
Figure 11-1: Dedicated Port Structure Block Diagram
QD
CK
WR LAT
TRIS Latch
I/O pin
WR PORT
Data Bus
QD
CK
Data Latch
Read LAT
Read Port
Read TRIS
WR TRIS
I/O Cell
Dedicated Port Module