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Microchip Technology dsPIC30F - Introduction; Control Register Descriptions

Microchip Technology dsPIC30F
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dsPIC30F Family Reference Manual
DS70069C-page 22-2 © 2004 Microchip Technology Inc.
22.1 Introduction
The dsPIC Data Converter Interface (DCI) module allows simple interfacing of devices, such as
audio coder/decoders (codecs), A/D converters, and D/A converters.
The following interfaces are supported:
Framed Synchronous Serial Transfer (Single or Multi-Channel)
Inter-IC Sound (I
2
S) Interface
AC-Link Compliant mode
Many codecs intended for use in audio applications support sampling rates between 8 kHz and
48 kHz and use one of the interface protocols listed above. The DCI automatically handles the
interface timing associated with these codecs. No overhead from the CPU is required until the
requested amount of data has been transmitted and/or received by the DCI. Up to four data
words may be transferred between CPU interrupts.
The data word length for the DCI is programmable up to 16 bits to match the data size of the
dsPIC30F CPU. However, many codecs have data word sizes greater than 16 bits. Long data
word lengths can be supported by the DCI. The DCI is configured to transmit/receive the long
word in multiple 16-bit time slots. This operation is transparent to the user and the long data word
is stored in consecutive register locations.
The DCI can support up to 16 time slots in a data frame, for a maximum frame size of 256 bits.
There are control bits for each time slot in the data frame that determine whether the DCI will
transmit/receive during the time slot.
22.2 Control Register Descriptions
The DCI has five Control registers and one Status register, which are listed below:
DCICON1: DCI module enable and mode bits.
DCICON2: DCI module word length, data frame length, and buffer setup.
DCICON3: DCI module bit clock generator setup.
DCISTAT: DCI module status information.
RSCON: Active frame time slot control for data reception.
TSCON: Active frame time slot control for data transmit.
In addition to these Control and Status registers, there are four Transmit registers,
TXBUF0....TXBUF3, and four Receive registers, RXBUF0....RXBUF3.

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