© 2004 Microchip Technology Inc. DS70067C-page 20-19
Section 20. Serial Peripheral Interface (SPI)
Serial Peripheral
Interface (SPI)
20
20.4 SPI Master Mode Clock Frequency
In the Master mode, the clock provided to the SPI module is the instruction cycle (TCY). This clock
will then be prescaled by the primary prescaler (specified by PPRE<1:0> (SPIxCON<1:0>)), and
the secondary prescaler (specified by SPRE<2:0> (SPIxCON<4:2>)). The prescaled instruction
clock becomes the serial clock and is provided to external devices via the SCKx pin.
Equation 20-1 can be used to calculate the SCKx clock frequency as a function of the primary
and secondary prescaler settings.
Equation 20-1:
Some sample SPI clock frequencies (in kHz) are shown in the table below:
Table 20-1: Sample SCKx Frequencies
Note: Note that the SCKx signal clock is not free running for normal SPI modes. It will only
run for 8 or 16 pulses when the SPIxBUF is loaded with data. It will however, be
continuous for Framed modes.
Primary Prescaler * Secondary Prescaler
F
CY
F
SCK =
FCY = 30 MHz
Secondary Prescaler Settings
1:1 2:1 4:1 6:1 8:1
Primary Prescaler Settings 1:1 30000 15000 7500 5000 3750
4:1 7500 3750 1875 1250 938
16:1 1875 938 469 313 234
64:1 469 234 117 78 59
F
CY = 5 MHz
Primary Prescaler Settings 1:1 5000 2500 1250 833 625
4:1 1250 625 313 208 156
16:1 313 156 78 52 39
64:1 78 39 20 13 10
Note: SCKx frequencies shown in kHz.
Note: Not all clock rates are supported. For further information, refer to the SPI timing
specifications in the specific device data sheet.
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