Microchip Technology dsPIC30F - Programmers Model

dsPIC30F Family Reference Manual
DS70049C-page 2-4 © 2004 Microchip Technology Inc.
2.2 Programmer’s Model
The programmer’s model for the dsPIC30F is shown in Figure 2-2. All registers in the program-
mer’s model are memory mapped and can be manipulated directly by instructions. A description
of each register is provided in Table 2-1.
In addition to the registers contained in the programmer’s model, the dsPIC30F contains control
registers for modulo addressing, bit-reversed addressing and interrupts. These registers are
described in subsequent sections of this document.
All registers associated with the programmer’s model are memory mapped, as shown in
Table 2-8 on page 2-38.
Table 2-1: Programmer’s Model Register Descriptions
Register(s) Name Description
W0 through W15 Working register array
ACCA, ACCB 40-bit DSP Accumulators
PC 23-bit Program Counter
SR ALU and DSP Engine Status register
SPLIM Stack Pointer Limit Value register
TBLPAG Table Memory Page Address register
PSVPAG Program Space Visibility Page Address register
RCOUNT REPEAT Loop Count register
DCOUNT DO Loop Count register
DOSTART DO Loop Start Address register
DOEND DO Loop End Address register
CORCON Contains DSP Engine and DO Loop control bits