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Microchip Technology dsPIC30F - Programmable Digital Noise Filters

Microchip Technology dsPIC30F
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© 2004 Microchip Technology Inc. DS70063C-page 16-9
Section 16. Quadrature Encoder Interface (QEI)
Quadrature Encoder
Interface (QEI)
16
16.3 Programmable Digital Noise Filters
The digital noise filter section is responsible for rejecting noise on the incoming index and
quadrature signals. Schmitt trigger inputs and a three-clock cycle delay filter combine to reject
low level noise and large, short duration noise spikes that typically occur in noise-prone
applications such as a motor system applications.
The filter ensures that the filtered output signals are not permitted to change until a stable value
has been registered for three consecutive filter cycles.
The rate of the filter clocks determines the low passband of the filter. A slower filter clock results
in a passband rejecting lower frequencies than a faster filter clock. The filter clock is the device
F
CY clock divided by a programmable divisor.
Setting the QEOUT bit (DFLTCON<7>) enables the filter for channels QEA and QEB. The
QECK<2:0> bits (DFLTCON<6:4>) specify the filter clock divisor used for channels QEA and
QEB. Setting the INDOUT bit (DFLTCON<3>) enables the filter for the index channel. The
INDCK<2:0> bits (DFLTCON<2:0>) specify the filter clock divisor used for the index channel. At
reset, the filters for all channels are disabled.
Some devices do not have separate control bits for the QEx input digital filters and the INDX
input digital filter. For these devices, the QEOUT and QECK<2:0> control bits set the digital filter
characteristics for both the QEA/QEB and INDX pins. See Register 16-2 and Register 16-3 for
more information.
Figure 16-4 depicts a simplified block diagram for the digital noise filter.
Figure 16-4: Simplified Digital Noise Filter Block Diagram
Figure 16-5: Signal Propagation Through Filter, 1:1 Filter Clock Divide
QEn
DQ
TCY
J
Q
K
QEn
DQ DQ DQ
Filtered
Clock
Divider
Circuit
TCY
Non-filtered
0
1
CK
3
CKCK
CK
CKCK
CK
CK
pin
Filter
QEOUT
QECK<2:0>
Output
Note: ‘n’ denotes the phase input, A or B.
TCY
QEn Pin
QEn Filter

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