© 2004 Microchip Technology Inc. DS70062C-page 15-37
Section 15. Motor Control PWM
Motor Control
PWM
15
15.13.2 PWM Operation in Idle Mode
When the device enters Idle mode, the system clock sources remain functional and the CPU
stops executing code. The PWM module can optionally continue to operate in Idle mode.The
PTSIDL bit (PTCON<13>) selects if the PWM module will stop in Idle mode or continue to
operate normally.
If PTSIDL = 0, the module will operate normally when the device enters Idle mode. The PWM
time base interrupt, if enabled, can be used to wake the device from Idle. If the PWM time base
interrupt enable bit is set (PTIE = 1), then the device will wake from Idle when the PWM time base
interrupt is generated. If the PWM time base interrupt priority is greater than the current CPU
priority, then program execution will start at the PWM interrupt vector location upon wake-up.
Otherwise, execution will continue from the next instruction following the PWRSAV instruction.
If PTSIDL = 1, the module will stop in Idle mode. If the PWM module is programmed to stop in
Idle mode, the operation of the PWM outputs and fault input pins will be the same as the
operation in Sleep mode. (See discussion in Section 15.13.1 “PWM Operation in Sleep
mode”.)
15.14 Special Features for Device Emulation
The PWM module has a special feature to support the debugging environment. All enabled
PWM pins can be optionally tri-stated when the hardware emulator or debugger device is halted
to examine memory contents. The user should install pull-up or pull-down resistors to ensure
the PWM outputs are driven to the correct state when device execution is halted.
The function of the PWM output pins at a device Reset and the output pin polarity is determined
by three device configuration bits (see Section 15.9 “PWM Output and Polarity Control”).
The hardware debugger or emulation tool provides a method to change the values of these
configuration bits. Please refer to the tool’s user’s manual for more information.
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