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Microchip Technology dsPIC30F - Section 9. Low Voltage Detect (Lvd)

Microchip Technology dsPIC30F
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© 2004 Microchip Technology Inc. DS70056C-page 9-3
Section 9. Low Voltage Detect
Low Voltage
Detect (LVD)
9
Figure 9-2 shows the block diagram for the LVD module. A comparator uses an internally
generated reference voltage as the set point. When the selected tap output of the device voltage
is lower than the reference voltage, the LVDIF bit (IFS2<10>) is set.
Each node in the resistor divider represents a “trip point” voltage. This voltage is software
programmable to any one of 16 values.
Figure 9-2: Low Voltage Detect (LVD) Block Diagram
9.1.1 LVD Control Bits
The LVD module control bits are located in the RCON register.
The LVDEN bit (RCON<12>) enables the Low Voltage Detect module. The LVD module is
enabled when LVDEN = 1. If power consumption is important, the LVDEN bit can be cleared for
maximum power savings.
9.1.1.1 LVD Trip Point Selection
The LVDL<3:0> bits (RCON<11:8>) will choose the LVD trip point. There are 15 trip point options
that may be selected from the internal voltage divider connected to V
DD. If none of the trip point
options are suitable for the application, there is one option that allows the LVD sample voltage to
be applied externally on the LVDIN pin. (Refer to the specific device data sheet for the pin
location.) The nominal trip point voltage for the external LVD input is 1.24 volts. The LVD external
input option requires that the user select values for an external voltage divider circuit that will
generate a LVD interrupt at the desired V
DD.
9.1.2 Internal Voltage Reference
The LVD uses an internal bandgap voltage reference circuit that requires a nominal amount of
time to stabilize. Refer to the “Electrical Specifications” in the specific device data sheet for
details. The BGST status bit (RCON<13>) indicates when the bandgap voltage reference has
stabilized. The user should poll the BGST status bit in software after the LVD module is enabled.
At the end of the stabilization time, the LVDIF bit (IFS2<10>) should be cleared. Refer to the LVD
module setup procedure in Section 9.2 “LVD Operation”.
The bandgap voltage reference circuit can also be used by other peripherals on the device so it
may already be active (and stabilized) prior to enabling the LVD module.
VDD
LVDIF
16 to 1 MUX
LVDEN
Internally Generated
Reference Voltage
LVDIN
LVDL<3:0>
External LVD Input pin
4

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