dsPIC30F Family Reference Manual
DS70050C-page 3-2 © 2004 Microchip Technology Inc.
3.1 Introduction
The dsPIC30F data width is 16-bits. All internal registers and data space memory are organized
as 16-bits wide. The dsPIC30F features two data spaces. The data spaces can be accessed
separately (for some DSP instructions) or together as one 64-Kbyte linear address range (for
MCU instructions). The data spaces are accessed using two Address Generation Units (AGUs)
and separate data paths.
An example data space memory map is shown in Figure 3-1.
Data memory addresses between 0x0000 and 0x07FF are reserved for the device special
function registers (SFRs). The SFRs include control and status bits for the CPU and peripherals
on the device.
The RAM begins at address 0x0800 and is split into two blocks, X and Y data space. For data
writes, the X and Y data spaces are always accessed as a single, linear data space. For data
reads, the X and Y memory spaces can be accessed independently or as a single, linear space.
Data reads for MCU class instructions always access the the X and Y data spaces as a single
combined data space. Dual source operand DSP instructions, such as the MAC instruction,
access the X and Y data spaces separately to support simultaneous reads for the two source
operands.
MCU instructions can use any W register as an address pointer for a data read or write operation.
During data reads, the DSP class of instructions isolates the Y address space from the total data
space. W10 and W11 are used as address pointers for reads from the Y data space. The remain-
ing data space is referred to as X space, but could more accurately be described as “X minus Y”
space. W8 and W9 are used as address pointers for data reads from the X data space in DSP
class instructions.
Figure 3-2 shows how the data memory map functions for both MCU class and DSP class
instructions. Note that it is the W register number and type of instruction that determines how
address space is accessed for data reads. In particular, MCU instructions treat the X and Y
memory as a single combined data space. The MCU instructions can use any W register as an
address pointer for reads and writes. The DSP instructions that can simultaneously pre-fetch two
data operands, split the data memory into two spaces. Specific W registers must be used for read
address pointers in this case.
Some DSP instructions have the ability to store the accumulator that is not targeted by the
instruction to data memory. This function is called “accumulator write back”. W13 must be used
as an address pointer to the combined data memory space for accumulator write back
operations.
For DSP class instructions, W8 and W9 should point to implemented X memory space for all
memory reads. If W8 or W9 points to Y memory space, zeros will be returned. If W8 or W9 points
to an unimplemented memory address, an address error trap will be generated.
For DSP class instructions, W10 and W11 should point to implemented Y memory space for all
memory reads. If W10 or W11 points to implemented X memory space, all zeros will be returned.
If W10 or W11 points to an unimplemented memory address, an address error trap will be
generated. For additional information on address error traps, refer to Section 6. “Reset Inter-
rupts”.
Note: The data memory map and the partition between the X and Y data spaces is device
specific. Refer to the specific dsPIC30F device data sheet for further details.
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