dsPIC30F Family Reference Manual
DS70060C-page 13-2 © 2004 Microchip Technology Inc.
13.1 Introduction
This section describes the Input Capture module and its associated Operational modes. The
Input Capture module is used to capture a timer value from one of two selectable time bases,
upon an event on an input pin. The Input Capture features are quite useful in applications
requiring frequency (Time Period) and pulse measurement. Figure 13-1 depicts a simplified
block diagram of the Input Capture module.
Refer to the specific device data sheet for further information on the number of channels
available in a particular device. All Input Capture channels are functionally identical. In this
section, an ‘x’ in the pin name or register name denotes the specific Input Capture channel.
The Input Capture module has multiple Operating modes, which are selected via the ICxCON
register. The Operating modes include:
• Capture timer value on every falling edge of input applied at the ICx pin
• Capture timer value on every rising edge of input applied at the ICx pin
• Capture timer value on every fourth rising edge of input applied at the ICx pin
• Capture timer value on every 16th rising edge of input applied at the ICx pin
• Capture timer value on every rising and every falling edge of input applied at the ICx pin
The Input Capture module has a four-level FIFO buffer. The number of capture events required
to generate a CPU interrupt can be selected by the user.
Figure 13-1: Input Capture Block Diagram
ICxBUF
ICx pin
ICM<2:0>(ICxCON<2:0>)
Mode Select
3
10
Set Flag ICxIF
(in IFSn Register)
TMRy
TMRz
Edge Detection Logic
16 16
FIFO
R/W
Logic
ICxI<1:0>
ICBNE, ICOV(ICxCON<4:3>)
ICxCON
Interrupt
Logic
System Bus
From 16-bit Timers
ICTMR
(ICxCON<7>)
FIFO
Prescaler
Counter
(1, 4, 16)
and
Clock Synchronizer
Note: An ‘x’ in a signal, register or bit name denotes the number of the capture channel.
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