© 2004 Microchip Technology Inc. DS70067C-page 20-7
Section 20. Serial Peripheral Interface (SPI)
Serial Peripheral
Interface (SPI)
20
20.3 Modes of Operation
The SPI module has flexible Operating modes which are discussed in the following subsections:
• 8-bit and 16-bit Data Transmission/Reception
• Master and Slave Modes
• Framed SPI Modes
20.3.1 8-bit vs. 16-bit Operation
A control bit, MODE16 (SPIxCON<10>), allows the module to communicate in either 8-bit or
16-bit modes. The functionality will be the same for each mode except the number of bits that are
received and transmitted. Additionally, the following should be noted in this context:
• The module is reset when the value of the MODE16 (SPIxCON<10>) bit is changed.
Consequently, the bit should not be changed during normal operation.
• Data is transmitted out of bit 7 of the SPIxSR for 8-bit operation while it is transmitted and
out of bit 15 of the SPIxSR for 16-bit operation. In both modes, data is shifted into bit ‘0’ of
the SPIxSR.
• 8 clock pulses at the SCKx pin are required to shift in/out data in 8-bit mode, while 16 clock
pulses are required in the 16-bit mode.
20.3.2 Master and Slave Modes
Figure 20-2: SPI Master/Slave Connection
Serial Receive Buffer
(SPIxRXB)
Shift Register
(SPIxSR)
LSbit
MSbit
SDIx
SDOx
PROCESSOR 2 [SPI Slave]
SCKx
SSx
Serial Transmit Buffer
(SPIxTXB)
Serial Receive Buffer
(SPIxRXB)
Shift Register
(SPIxSR)
MSbit
LSbit
SDOx
SDIx
PROCESSOR 1 [SPI Master]
Serial Clock
.
(SSEN(SPIxCON<7>) = 1 and
MSTEN(SPIxCON<5> = 0))
Note 1: Using the SSx pin in Slave mode of operation is optional.
2: User must write transmit data to/read received data from SPIxBUF. The SPIxTXB and SPIxRXB registers
are memory mapped to SPIxBUF.
SSx
SCKx
Serial Transmit Buffer
(SPIxTXB)
(MSTEN(SPIxCON<5> = 1))
SPI Buffer
(SPIxBUF)
SPI Buffer
(SPIxBUF)