dsPIC30F Family Reference Manual
DS70052C-page 5-10 © 2004 Microchip Technology Inc.
5.4.2.1 Flash Program Memory Programming Algorithm
The user can erase and program Flash Program Memory by rows (32 instruction words). The
general process is as follows:
1. Read one row of program Flash (32 instruction words) and store into data RAM as a data
“image”. The RAM image must be read from an even 32-word program memory address
boundary.
2. Update the RAM data image with the new program memory data.
3. Erase program Flash row.
• Setup NVMCON register to erase 1 row of Flash program memory.
• Write address of row to be erased into NVMADRU and NVMADR registers.
• Disable interrupts.
• Write the key sequence to NVMKEY to enable the erase.
• Set the WR bit. This will begin erase cycle.
• CPU will stall for the duration of the erase cycle.
• The WR bit is cleared when erase cycle ends.
• Re-enable interrupts.
4. Write 32 instruction words of data from RAM into the Flash program memory write latches.
5. Program 32 instruction words into program Flash.
• Setup NVMCON to program one row of Flash program memory.
• Disable interrupts.
• Write the key sequence to NVMKEY to enable the program cycle.
• Set the WR bit. This will begin the program cycle.
• CPU will stall for duration of the program cycle.
• The WR bit is cleared by the hardware when program cycle ends.
• Re-enable interrupts.
6. Repeat steps 1 through 6, as needed, to program the desired amount of Flash program
memory
Note: The user should remember that the minimum amount of program memory that can
be modified using RTSP is 32 instruction word locations. Therefore, it is important
that an image of these locations be stored in general purpose RAM before an erase
cycle is initiated. An erase cycle must be performed on any previously written
locations before any programming is done.
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