© 2004 Microchip Technology Inc. DS70049C-page 2-13
Section 2. CPU
CPU
2
Register 2-1: SR: CPU Status Register (Continued)
bit 7-5 IPL<2:0>: CPU Interrupt Priority Level Status bits
(1)
111 = CPU Interrupt Priority Level is 7 (15). User interrupts disabled.
110 = CPU Interrupt Priority Level is 6 (14)
101 = CPU Interrupt Priority Level is 5 (13)
100 = CPU Interrupt Priority Level is 4 (12)
011 = CPU Interrupt Priority Level is 3 (11)
010 = CPU Interrupt Priority Level is 2 (10)
001 = CPU Interrupt Priority Level is 1 (9)
000 = CPU Interrupt Priority Level is 0 (8)
Note 1: The IPL<2:0> bits are concatenated with the IPL<3> bit (CORCON<3>) to form the CPU
Interrupt Priority Level. The value in parentheses indicates the IPL if IPL<3> = 1. User interrupts
are disabled when IPL<3> = 1.
2: The IPL<2:0> status bits are read only when NSTDIS = 1 (INTCON1<15>).
bit 4 RA: REPEAT Loop Active bit
1 = REPEAT loop in progress
0 = REPEAT loop not in progress
bit 3 N: MCU ALU Negative bit
1 = Result was negative
0 = Result was non-negative (zero or positive)
bit 2 OV: MCU ALU Overflow bit
This bit is used for signed arithmetic (2’s complement). It indicates an overflow of the magnitude which
causes the sign bit to change state.
1 = Overflow occurred for signed arithmetic (in this arithmetic operation)
0 = No overflow occurred
bit 1 Z: MCU ALU Zero bit
1 = An operation which effects the Z bit has set it at some time in the past
0 = The most recent operation which effects the Z bit has cleared it (i.e., a non-zero result)
bit 0 C: MCU ALU Carry/Borrow
bit
1 = A carry-out from the Most Significant bit of the result occurred
0 = No carry-out from the Most Significant bit of the result occurred
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
C = Clear only bit S = Set only bit -n = Value at POR
‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
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