© 2004 Microchip Technology Inc. DS70062C-page 15-5
Section 15. Motor Control PWM
Motor Control
PWM
15
Register 15-1: PTCON: PWM Time Base Control Register
Upper Byte:
R/W-0 U-0 R/W-0 U-0 U-0 U-0 U-0 U-0
PTEN
—PTSIDL— — — — —
bit 15 bit 8
Lower Byte:
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
PTOPS<3:0> PTCKPS<1:0> PTMOD<1:0>
bit 7 bit 0
bit 15 PTEN: PWM Time Base Timer Enable bit
1 = PWM time base is ON
0 = PWM time base is OFF
bit 14 Unimplemented: Read as ‘0’
bit 13 PTSIDL: PWM Time Base Stop in Idle Mode bit
1 = PWM time base halts in CPU Idle mode
0 = PWM time base runs in CPU Idle mode
bit 12-8 Unimplemented: Read as ‘0’
bit 7-4 PTOPS<3:0>: PWM Time Base Output Postscale Select bits
1111 = 1:16 Postscale
•
•
0001 = 1:2 Postscale
0000 = 1:1 Postscale
bit 3-2 PTCKPS<1:0>: PWM Time Base Input Clock Prescale Select bits
11 = PWM time base input clock period is 64 T
CY (1:64 prescale)
10 = PWM time base input clock period is 16 T
CY (1:16 prescale)
01 = PWM time base input clock period is 4 T
CY (1:4 prescale)
00 = PWM time base input clock period is T
CY (1:1 prescale)
bit 1-0 PTMOD<1:0>: PWM Time Base Mode Select bits
11 = PWM time base operates in a continuous up/down mode with interrupts for double PWM updates
10 = PWM time base operates in a continuous up/down counting mode
01 = PWM time base operates in single event mode
00 = PWM time base operates in a free running mode
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
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