© 2004 Microchip Technology Inc. DS70064C-page 17-5
Section 17. 10-bit A/D Converter
10-bit A/D
Converter
17
Register 17-1: ADCON1: A/D Control Register 1
Upper Byte:
R/W-0 U-0 R/W-0 U-0 U-0 U-0 R/W-0 R/W-0
ADON
—ADSIDL— — —FORM<1:0>
bit 15 bit 8
Lower Byte:
R/W-0 R/W-0 R/W-0 U-0 R/W-0 R/W-0 R/W-0
HC, HS
R/C-0
HC, HS
SSRC<2:0>
— SIMSAM ASAM SAMP DONE
bit 7 bit 0
bit 15 ADON: A/D Operating Mode bit
1 = A/D converter module is operating
0 = A/D converter is off
bit 14 Unimplemented: Read as ‘0’
bit 13 ADSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
bit 12-10 Unimplemented: Read as ‘0’
bit 9-8 FORM<1:0>: Data Output Format bits
11 = Signed Fractional (DOUT = sddd dddd dd00 0000)
10 = Fractional (DOUT = dddd dddd dd00 0000)
01 = Signed Integer (DOUT = ssss sssd dddd dddd)
00 = Integer (DOUT = 0000 00dd dddd dddd)
bit 7-5 SSRC<2:0>: Conversion Trigger Source Select bits
111 = Internal counter ends sampling and starts conversion (auto convert)
110 = Reserved
101 = Reserved
100 = Reserved
011 = Motor Control PWM interval ends sampling and starts conversion
010 = GP Timer3 compare ends sampling and starts conversion
001 = Active transition on INT0 pin ends sampling and starts conversion
000 = Clearing SAMP bit ends sampling and starts conversion
bit 4 Unimplemented: Read as ‘0’
bit 3 SIMSAM: Simultaneous Sample Select bit (only applicable when CHPS = 01 or 1x)
1 = Samples CH0, CH1, CH2, CH3 simultaneously (when CHPS = 1x)
or
Samples CH0 and CH1 simultaneously (when CHPS = 01)
0 = Samples multiple channels individually in sequence
bit 2 ASAM: A/D Sample Auto-Start bit
1 = Sampling begins immediately after last conversion completes. SAMP bit is auto set.
0 = Sampling begins when SAMP bit set
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