Microchip Technology dsPIC30F - Page 493

© 2004 Microchip Technology Inc. DS70067C-page 20-3
Section 20. Serial Peripheral Interface (SPI)
Serial Peripheral
Interface (SPI)
20
Figure 20-1: SPI Module Block Diagram
Internal
Data Bus
SDIx
SDOx
SS
x
SCKx
SPIxSR
bit0
Shift
Control
Edge
Select
F
CY
Primary
1, 4, 16, 64
Enable Master Clock
Prescaler
Secondary
Prescaler
1:1 → 1:8
Slave Select
Sync Control
Clock
Control
Transmit
SPIxRXB
Receive
and Frame
Note: The SPIxTXB and SPIxRXB registers are memory mapped to the SPIxBUF register.
Registers share address SPIxBUF
SPIxTXB
SPIxBUF