Microchip Technology dsPIC30F - Page 517

© 2004 Microchip Technology Inc. DS70068C-page 21-3
Section 21. Inter-Integrated Circuit (I
2
C)
Inter-Integrated
Circuit (I
2
C)
21
Figure 21-1: I
2
C Block Diagram
I2CRSR
I2CRCV
Internal
Data Bus
SCL
SDA
Shift
Match Detect
I2CADD
Start and
Stop bit Detect
Clock
Address_Match
Clock
Stretching
I2CTRN
LSB
Shift
Clock
Write
Read
BRG Down Counter
I2CBRG
Reload
Control
TCY/2
Start and Stop
bit Generate
Write
Read
Acknowledge
Generation
Collision
Detect
Write
Read
Write
Read
I2CCON
Write
Read
I2CSTAT
Control Logic
Read
LSB