Microchip Technology dsPIC30F - Page 539

© 2004 Microchip Technology Inc. DS70068C-page 21-25
Section 21. Inter-Integrated Circuit (I
2
C)
Inter-Integrated
Circuit (I
2
C)
21
Figure 21-15: Master Message (Typical I
2
C Message: Read of Serial EEPROM)
1
- Setting the SEN bit starts a Start event.
AKDT
ACKEN
SEN
SCL
SDA
SCL
SDA
I2CTRN
TBF
I2CRCV
RBF
MI2CIF
ACKSTAT
1 2 3 4 5 6 7 8
A1A0
9
A
PEN
RCEN
1 2 3 4 5 6 7 8
A11
A10
A9
A8
1 2 3 4 5 6 7 8 9
W1 1
RSEN
1 2 3 4 5 6 7 8 9
1 32
9
A
1 2 3 4 5 6 7 8
D3D2D1D0D7D6D5D4
9
N
AA
4 5 7 8 9
2
- Writing the I2CTRN register starts a master transmission. The data is the serial
3
- Writing the I2CTRN register starts a master transmission. The data is the first
4
-
5
- Writing the I2CTRN register starts a master transmission. The data is a resend of
6
- Setting the RCEN bit starts a master reception. On interrupt, the software reads
7 9
- Setting the ACKEN bit starts an Acknowledge event. ACKDT = 0 to send NACK.
- Setting the PEN bit starts a master Stop event.
EE device address byte, with R/W
clear indicating a write.
byte of the EE data address.
the serial EE device address byte, but with R/W
bit set indicating a read.
the I2CRCV register, which clears the RBF flag.
0 0
A2 A7A6A5A4 A2A1A0 A1A0
R
1
10 0
A2
0 0 0 0
6
- Writing the I2CTRN register starts a master transmission. The data is the second
byte of the EE data address.
8
- Setting the RSEN bit starts a Repeated Start event.
(Master) (Master)
(Slave) (Slave)
A3
MI2CIF cleared by user software.