© 2004 Microchip Technology Inc. DS70050C-page 3-15
Section 3. Data Memory
Data Memory
3
3.4.2 Bit-Reversed Addressing Operation
Bit-reversed addressing is only supported by the X WAGU and is controlled by the MODCON
and XBREV special function registers. Bit-reversed addressing is invoked as follows:
1. Bit-reversed addressing is assigned to one of the W registers using the BWM control bits
(MODCON<11:8>).
2. Bit-reversed addressing is enabled by setting the BREN control bit (XBREV<15>).
3. The X AGU bit-reverse modifier is set via the XB control bits (XBREV<14:0>).
When enabled, the bit-reversed addressing hardware will generate bit-reversed addresses, only
when the register indirect with Pre- or Post-increment Addressing modes are used ([Wn++],
[++Wn]). Furthermore, bit-reverse addresses are only generated for Word mode instructions. It
will not function for all other Addressing modes or Byte mode instructions (normal addresses will
be generated).
3.4.2.1 Modulo Addressing and Bit-Reversed Addressing
Modulo addressing and bit-reversed addressing can be enabled simultaneously using the same
W register, but bit-reversed addressing operation will always take precedence for data writes
when enabled. As an example, the following setup conditions would assign the same W register
to modulo and bit-reversed addressing:
• X modulo addressing is enabled (XMODEN = 1)
• Bit-reverse addressing is enabled (BREN = 1)
• W1 assigned to modulo addressing (XWM<3:0> = 0001)
• W1 assigned to bit-reversed addressing (BWM<3:0> = 0001)
For data reads that use W1 as the pointer, modulo address boundary checking will occur. For
data writes using W1 as the destination pointer, the bit-reverse hardware will correct W1 for data
re-ordering.
3.4.2.2 Data Dependencies Associated with XBREV
If bit-reversed addressing has already been enabled by setting the BREN (XBREV<15>) bit, then
a write to the XBREV register should not be followed by an indirect read operation using the W
register, designated as the bit reversed address pointer.
Note: A write to the MODCON register should not be followed by an instruction that per-
forms an indirect read operation using a W register. Unexpected results may occur.
Some instructions perform an implicit indirect read. These are: POP, RETURN,
RETFIE, RETLW and ULNK.
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