Microchip Technology dsPIC30F - Page 87

© 2004 Microchip Technology Inc. DS70051C-page 4-3
Section 4. Program Memory
Program
Memory
4
Figure 4-1: Example Program Space Memory Map
Note: The address boundaries for user Flash program memory and data EEPROM memory will depend on the dsPIC30F device variant
that is selected. Refer to the appropriate device data sheet for further details.
Reset - Target Address
User Memory
Space
000000
00007E
Level 15 Trap Vector
000002
000080
Device Configuration
User Flash
Program Memory
018000
017FFE
Configuration Memory
Space
Data EEPROM
Level 14 Trap Vector
Level 13 Trap Vector
Level 12 Trap Vector
Level 11 Trap Vector
Level 10 Trap Vector
Level 9 Trap Vector
Level 8 Trap Vector
Interrupt 0 Vector
Interrupt 1 Vector
Interrupt 52 Vector
Interrupt 53 Vector
(48K Instructions)
(4 Kbytes)
800000
F80000
Registers
F8000E
F80010
DEVID (2)
FEFFFE
FF0000
FFFFFE
Reserved
F7FFFE
Reserved
7FF000
7FEFFE
(Read 0’s)
8005FE
800600
UNITID
000014
Interrupt Vector Table
8005BE
8005C0
Reset - GOTO Instruction
000004
Reserved
7FFFFE
Reserved
000100
0000FE
000084
Reserved
Level 15 Trap Vector
Level 14 Trap Vector
Level 13 Trap Vector
Level 12 Trap Vector
Level 11 Trap Vector
Level 10 Trap Vector
Level 9 Trap Vector
Level 8 Trap Vector
Interrupt 0 Vector
Interrupt 1 Vector
Interrupt 52 Vector
Interrupt 53 Vector
000082
Alternate Interrupt Vector Table