RL78/G1H CHAPTER 6 CLOCK GENERATOR
R01UH0575EJ0120 Rev. 1.20 Page 102 of 920
Dec 22, 2016
Figure 6 - 2 Format of Clock operation mode control register (CMC)
Caution 1. The CMC register can be written only once after reset release, by an 8-bit memory manipulation
instruction. When using the CMC register with its initial value (00H), be sure to set the register to 00H
after a reset ends in order to prevent malfunction due to a program loop. Such a malfunction
becomes unrecoverable when a value other than 00H is mistakenly written.
Caution 2. After reset release, set the CMC register before X1 or XT1 oscillation is started as set by the clock
operation status control register (CSC).
Caution 3. Be sure to set the AMPH bit to 1 if the X1 clock oscillation frequency exceeds 10 MHz.
Caution 4. Specify the settings for the AMPH, AMPHS1, and AMPHS0 bits while f
IH is selected as fCLK after a
reset ends (before f
CLK is switched to fMX or fSUB).
Caution 5. Oscillation stabilization time of f
XT, counting on the software.
Caution 6. Although the maximum system clock frequency is 32 MHz, the maximum frequency of the X1
oscillator is 20 MHz.
(Cautions and Remark are given on the next page.)
Address: FFFA0H After reset: 00H R/W
Symbol76543210
CMC EXCLK OSCSEL EXCLKS OSCSELS 0 AMPHS1 AMPHS0 AMPH
EXCLK OSCSEL
High-speed system clock
pin operation mode
X1/P121 pin X2/EXCLK/P122 pin
0 0 Input port mode Input port
0 1 X1 oscillation mode Crystal/ceramic resonator connection
1 0 Input port mode Input port
1 1 External clock input mode Input port External clock input
EXCLKS OSCSELS
Subsystem clock pin
operation mode
XT1/P123 pin XT2/EXCLKS/P124 pin
0 0 Input port mode Input port
0 1 XT1 oscillation mode Crystal resonator connection
1 0 Input port mode Input port
1 1 External clock input mode Input port External clock input
AMPHS1 AMPHS0 XT1 oscillator oscillation mode selection
0 0 Low power consumption oscillation (default)
0 1 Normal oscillation
1 0 Ultra-low power consumption oscillation
1 1 Setting prohibited
AMPH Control of X1 clock oscillation frequency
0
1 MHz
≤ fX ≤ 10 MHz
1
10 MHz
< fX ≤ 20 MHz
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