RL78/G1H CHAPTER 7 TIMER ARRAY UNIT
R01UH0575EJ0120 Rev. 1.20 Page 187 of 920
Dec 22, 2016
(b) When operation starts with slave channel output mode (TOMmn = 1) setting (PWM output))
When slave channel output mode (TOMmn = 1), the active level is determined by timer output level
register m (TOLm) setting.
Figure 7 - 36 TOmn Pin Output Status at PWM Output (TOMmn = 1)
Remark 1. Set: The output signal of the TOmp pin changes from inactive level to active level.
Reset: The output signal of the TOmp pin changes from active level to inactive level.
Remark 2. m: Unit number (m = 0), n: Channel number (p = 3)
Initial
status
Hi -Z
Port output is enabled
Set
TOEmn
TOmp bit = 0
(Initial status: low)
TOmp bit = 1
(Initial status: high)
TOmp bit = 0
(Initial status: low)
TOmp bit = 1
(Initial status: high)
TOLmp bit = 0
(Active high)
TOLmp bit = 1
(Active low)
Reset
Set Set
Reset
TOmp
(Output)
Active Active Active
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