RL78/G1H CHAPTER 13 A/D CONVERTER
R01UH0575EJ0120 Rev. 1.20 Page 288 of 920
Dec 22, 2016
Figure 13 - 4 Timing Chart When A/D Voltage Comparator Is Used
Note 1. While in the software trigger mode or hardware trigger no-wait mode, the time from the rising of the ADCE bit to the falling
of the ADCS bit must be 1
μs or longer to stabilize the internal circuit.
Table 13 - 1 Settings of ADCS and ADCE Bits
ADCS ADCE A/D Conversion Operation
0 0 Conversion stopped state
0 1 Conversion standby state
1 0 Setting prohibited
1 1 Conversion-in-progress state
Table 13 - 2 Setting and Clearing Conditions for ADCS Bit
A/D Conversion Mode Set Conditions Clear Conditions
Software trigger Select mode Sequential
conversion mode
When 1 is written
to ADCS
When 0 is written to ADCS
One-shot
conversion mode
• When 0 is written to ADCS
• The bit is automatically cleared to 0 when A/D
conversion ends.
Hardware trigger
no-wait mode
Select mode Sequential
conversion mode
When 0 is written to ADCS
One-shot
conversion mode
When 0 is written to ADCS
Hardware trigger
wait mode
Select mode Sequential
conversion mode
When a hardware
trigger is input
When 0 is written to ADCS
One-shot
conversion mode
• When 0 is written to ADCS
• The bit is automatically cleared to 0 when A/D
conversion ends.
ADCE
ADCS
ADCS
ADCS
A/D power stabilization wait time
A/D voltage comparator
Software
trigger mode
Conversion start time
Note 2
Hardware trigger
no-wait mode
Hardware trigger
wait mode
1 is written
to ADCS.
Conversion start time
Note 2
Hardware trigger
detection
1 is written
to ADCS.
Hardware
trigger detection
Conversion start time
Note 2
Conversion
standby
Conversion
operation
Conversion
standby
Conversion
stopped
A/D voltage comparator: enables operation
Conversion
standby
Conversion
standby
Conversion
standby
Conversion
standby
Conversion
operation
Conversion
operation
Trigger
standby
Conversion
stopped
Conversion
stopped
Note 1
Note 1
0 is written to ADCS.
Cleared automatically upon completion of A/D conversion.
0 is written to ADCS.
Cleared automatically upon completion of A/D conversion.
0 is written to ADCS.
Cleared automatically upon completion of A/D conversion.
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