RL78/G1H CHAPTER 14 SERIAL ARRAY UNIT
R01UH0575EJ0120 Rev. 1.20 Page 327 of 920
Dec 22, 2016
Figure 14 - 1 shows the Block Diagram of Serial Array Unit 0.
Figure 14 - 1 Block Diagram of Serial Array Unit 0
Serial clock select register 0 (SPS0)
PRS
013
Selector
fCLK
fCLK/2
0
to fCLK/2
15
Selector
CKS02 CCS02 STS02 MD021
Communication controller
Edge
detection
Mode selection
CSI10
or UART1
(for transmission)
Shift register
Serial data register 02 (SDR02)
Interrupt
controller
Output
controller
Edge/
level
detection
SOE03 SOE02 0 0
SAU0EN
Peripheral enable
register 0 (PER0)
Serial mode register 02 (SMR02)
SE03 SE02 0 0
Serial channel
enable status
register 0 (SE0)
ST03 ST02 0 0
SS03 SS02 0 0
(Buffer register block)
(Clock division setting block)
Error controller
TXE
02
RXE
02
DAP
02
CKP
02
Serial communication operation setting register 02 (SCR02)
EOC
02
PECT
02
Serial flag clear trigger
register 02 (SIR02)
OVCT
02
PTC
021
SLC
020
PTC
020
DIR
02
SLC
021
DLS
020
TSF
02
OVF
02
BFF
02
PEF
02
Serial status register 02 (SSR02)
Communication
status
Clear
Communication controller
Mode selection
UART1
(for reception)
CK01
CK00
Prescaler
CK01
CK00
SNFEN
10
Noise
elimination
enabled/
disabled
SNFEN10
Edge/level
detection
Selector
When UART1
0 SOL02 0 0
Error controller
Serial output register 0 (SO0)
CKO03 SO03 SO02 0 0
0
Synchro-
nous
circuit
Synchro-
nous
circuit
Error
information
000 0000CKO02 0 0
PRS
012
PRS
011
PRS
010
PRS
003
PRS
002
PRS
001
PRS
000
Serial channel
start register 0 (SS0)
Serial channel
stop register 0 (ST0)
Serial output
enable register 0 (SOE0)
Serial output level
register 0 (SOL0)
Noise filter enable
register 0 (NFEN0)
0
Channel 3
Serial data input pin
(when CSI10: SI10)
(when UART1: RxD1)
Serial transfer end
interrupt
(when CSI10: INTCSI10)
(when UART1: INTST1)
Serial transfer end
interrupt
(when UART1: INTSR1)
Serial transfer error
interrupt (INTSRE1)
f
MCK
fSCK
fTCLK
Selector
Selector
Clock controller
Channel 2
fCLK/2
0
to fCLK/2
15
Serial data output pin
(when CSI10: SO10)
(when UART1: TxD1)
PM02
Output latch
(P02)
Serial clock I/O pin
(when CSI10: SCK10)
PM04
Output latch
(P04)