Renesas RL78/G1H User Manual

RL78/G1H CHAPTER 14 SERIAL ARRAY UNIT
R01UH0575EJ0120 Rev. 1.20 Page 334 of 920
Dec 22, 2016
Figure 14 - 5 Format of Serial clock select register m (SPSm)
Note When changing the clock selected for fCLK (by changing the system clock control register (CKC) value), do so
after having stopped (serial channel stop register m (STm) = 000FH) the operation of the serial array unit
(SAU).
Caution Be sure to clear bits 15 to 8 to “0”.
Remark 1.
fCLK: CPU/peripheral hardware clock frequency
Remark 2. k = 0, 1
Address: F0126H, F0127H (SPS0), F0166H, F0167H (SPS1) After reset: 0000H R/W
Symbol1514131211109876543210
SPSm00000000
PRS
m13
PRS
m12
PRS
m11
PRS
m10
PRS
m03
PRS
m02
PRS
m01
PRS
m00
PRS
mk3
PRS
mk2
PRS
mk1
PRS
mk0
Section of operation clock (CKmk)
Note
fCLK =
2 MHz
fCLK =
5 MHz
fCLK =
10 MHz
fCLK =
20 MHz
fCLK =
32 MHz
0000 f
CLK 2 MHz 5 MHz 10 MHz 20 MHz 32 MHz
0001 f
CLK/2 1 MHz 2.5 MHz 5 MHz 10 MHz 16 MHz
0010
f
CLK/2
2
500 kHz 1.25 MHz 2.5 MHz 5 MHz 8 MHz
0011
f
CLK/2
3
250 kHz 625 kHz 1.25 MHz 2.5 MHz 4 MHz
0100
f
CLK/2
4
125 kHz 313 kHz 625 kHz 1.25 MHz 2 MHz
0101
f
CLK/2
5
62.5 kHz 156 kHz 313 kHz 625 kHz 1 MHz
0110
f
CLK/2
6
31.3 kHz 78.1 kHz 156 kHz 313 kHz 500 kHz
0111
f
CLK/2
7
15.6 kHz 39.1 kHz 78.1 kHz 156 kHz 250 kHz
1000
f
CLK/2
8
7.81 kHz 19.5 kHz 39.1 kHz 78.1 kHz 125 kHz
1001
f
CLK/2
9
3.91 kHz 9.77 kHz 19.5 kHz 39.1 kHz 62.5 kHz
1010
f
CLK/2
10
1.95 kHz 4.88 kHz 9.77 kHz 19.5 kHz 31.3 kHz
1011
f
CLK/2
11
977 Hz 2.44 kHz 4.88 kHz 9.77 kHz 15.6 kHz
1100
f
CLK/2
12
488 Hz 1.22 kHz 2.44 kHz 4.88 kHz 7.8 kHz
1101
f
CLK/2
13
244 Hz 610 Hz 1.22 kHz 2.44 kHz 3.9 kHz
1110
f
CLK/2
14
122 Hz 305 Hz 610 Hz 1.22 kHz 1.95 kHz
1111
f
CLK/2
15
61 Hz 153 Hz 305 Hz 610 Hz 977 Hz

Renesas RL78/G1H Specifications

General

Brand	Renesas
Model	RL78/G1H
Category	Microcontrollers
Language	English