Renesas RL78/G1H User Manual

RL78/G1H CHAPTER 14 SERIAL ARRAY UNIT
R01UH0575EJ0120 Rev. 1.20 Page 393 of 920
Dec 22, 2016
Figure 14 - 61 Flowchart of Slave Reception (in Single-Reception Mode)
Note For the initial setting, refer to Figure 14 - 57.(Select transfer end interrupt)
SAU default setting
Starting CSI communication
Wait for receive completes
End of communication
Clear interrupt request flag (XXIF), reset interrupt mask (XXMK)
and set interrupt enable (EI).
Reading receive data to
SIOp (= SDRmn [7:0])
Yes
No
Ready for reception
Clear storage area setting and the number of receive data
(Storage area, Reception data pointer, Number of communication
data and Communication end flag are optionally set on the internal
RAM by the software)
Enables interrupt
Transfer end interrupt
When transmit end, interrupt is generated
Read receive data then writes to storage area , and counts
up the number of receive data.
Update receive data pointer.
RETI
Reception completed?
Disable interrupt (MASK)
Write STmn bit to 1
Check completion of number of receive data
Main routineInterrupt processing routineMain routine
Start communication when master start
providing the clock
Note

Renesas RL78/G1H Specifications

General

Brand	Renesas
Model	RL78/G1H
Category	Microcontrollers
Language	English