RL78/G1H CHAPTER 24 SAFETY FUNCTIONS
R01UH0575EJ0120 Rev. 1.20 Page 778 of 920
Dec 22, 2016
24.3.1.2 Flash memory CRC operation result register (PGCRCL)
This register is used to store the high-speed CRC operation results.
The PGCRCL register can be set by a 16-bit memory manipulation instruction.
Reset signal generation clears this register to 0000H.
Figure 24 - 2 Format of Flash memory CRC operation result register (PGCRCL)
Caution The PGCRCL register can only be written if CRC0EN (bit 7 of the CRC0CTL register) = 1.
Figure 24 - 3 shows the Flowchart of Flash Memory CRC Operation Function (High-speed CRC).
Address: F02F2H After reset: 0000H R/W
Symbol 15 14 13 12 11 10 9 8
PGCRCL PGCRC15 PGCRC14 PGCRC13 PGCRC12 PGCRC11 PGCRC10 PGCRC9 PGCRC8
76543210
PGCRC7 PGCRC6 PGCRC5 PGCRC4 PGCRC3 PGCRC2 PGCRC1 PGCRC0
PGCRC15 to PGCRC0 High-speed CRC operation results
0000H to FFFFH Store the high-speed CRC operation results.
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