RL78/G1H CHAPTER 30 INSTRUCTION SET
R01UH0575EJ0120 Rev. 1.20 Page 848 of 920
Dec 22, 2016
Note 1. Number of CPU clocks (fCLK) when the internal RAM area, SFR area, or extended SFR area is accessed, or when no
data is accessed.
Note 2. Number of CPU clocks (f
CLK) when the code flash memory is accessed, or when the data flash memory is accessed by
an 8-bit instruction.
Remark Number of clock is when program exists in the internal ROM (flash memory) area. If fetching the instruction from the
internal RAM area, the number becomes double number plus 3 clocks at a maximum.
Table 30 - 15 Operation List (11/18)
Instruction
Group
Mnemonic Operands Bytes
Clocks
Clocks
Flag
Note 1 Note 2
ZACCY
16-bit
operation
ADDW AX, #word
31—
AX, CY
←
AX + word
×××
AX, AX
11—
AX, CY
←
AX + AX
×××
AX, BC
11—
AX, CY
←
AX + BC
×××
AX, DE
11—
AX, CY
←
AX + DE
×××
AX, HL
11—
AX, CY
←
AX + HL
×××
AX, !addr16
314
AX, CY
←
AX + (addr16)
×××
AX, ES:!addr16
425
AX, CY
←
AX + (ES:addr16)
×××
AX, saddrp
21—
AX, CY
←
AX + (saddrp)
×××
AX, [HL+byte]
314
AX, CY
←
AX + (HL + byte)
×××
AX, ES: [HL+byte]
425
AX, CY
←
AX + ((ES:HL) + byte)
×××
SUBW AX, #word
31—
AX, CY
←
AX - word
×××
AX, BC
11—
AX, CY
←
AX - BC
×××
AX, DE
11—
AX, CY
←
AX - DE
×××
AX, HL
11—
AX, CY
←
AX - HL
×××
AX, !addr16
314
AX, CY
←
AX - (addr16)
×××
AX, ES:!addr16
425
AX, CY
←
AX - (ES:addr16)
×××
AX, saddrp
21—
AX, CY
←
AX - (saddrp)
×××
AX, [HL+byte]
314
AX, CY
←
AX - (HL + byte)
×××
AX, ES: [HL+byte]
425
AX, CY
←
AX - ((ES:HL) + byte)
×××
CMPW AX, #word 3 1 — AX - word ×××
AX, BC 1 1 — AX - BC ×××
AX, DE 1 1 — AX - DE ×××
AX, HL 1 1 — AX - HL ×××
AX, !addr16 3 1 4 AX - (addr16) ×××
AX, ES:!addr16 4 2 5 AX - (ES:addr16) ×××
AX, saddrp 2 1 — AX - (saddrp) ×××
AX, [HL+byte] 3 1 4 AX - (HL + byte) ×××
AX, ES: [HL+byte] 4 2 5 AX - ((ES:HL) + byte) ×××
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