RL78/G1H CHAPTER 30 INSTRUCTION SET
R01UH0575EJ0120 Rev. 1.20 Page 849 of 920
Dec 22, 2016
Note 1. Number of CPU clocks (fCLK) when the internal RAM area, SFR area, or extended SFR area is accessed, or when no
data is accessed.
Note 2. Number of CPU clocks (f
CLK) when the code flash memory is accessed, or when the data flash memory is accessed by
an 8-bit instruction.
Remark 1. Number of clock is when program exists in the internal ROM (flash memory) area. If fetching the instruction from the
internal RAM area, the number becomes double number plus 3 clocks at a maximum.
Remark 2. MACR indicates the multiplication and accumulation register (MACRH, MACRL).
Table 30 - 16 Operation List (12/18)
Instruction
Group
Mnemonic Operands Bytes
Clocks
Clocks
Flag
Note 1 Note 2
ZACCY
Multiply,
Divide,
Multiply &
accumulate
MULU X
11—
AX
←
A
×
X
MULHU
32—
BCAX
←
AX
×
BC (unsigned)
MULH
32—
BCAX
←
AX
×
BC (signed)
DIVHU
39—
AX (quotient), DE (remainder)
←
AX
÷
DE (unsigned)
DIVWU
317—
BCAX (quotient), HLDE (remainder)
←
BCAX
÷
HLDE (unsigned)
MACHU
33—
MACR
←
MACR + AX
×
BC (unsigned)
××
MACH
33—
MACR
←
MACR + AX
×
BC(signed)
××
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