__HAL_RCC_ETHMAC_CLK_DISABLE
__HAL_RCC_ETHMACTX_CLK_DISABLE
__HAL_RCC_ETHMACRX_CLK_DISABLE
__HAL_RCC_ETHMACPTP_CLK_DISABLE
__HAL_RCC_ETH_CLK_DISABLE
AHB1 Force Release Reset
__HAL_RCC_ETHMAC_FORCE_RESET
__HAL_RCC_ETHMAC_RELEASE_RESET
AHB1 Peripheral Low Power Enable Disable
__HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE
__HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE
__HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE
__HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE
__HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE
__HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE
__HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE
__HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE
AHB2 Peripheral Clock Enable Disable
__HAL_RCC_DCMI_CLK_ENABLE
__HAL_RCC_DCMI_CLK_DISABLE
__HAL_RCC_CRYP_CLK_ENABLE
__HAL_RCC_HASH_CLK_ENABLE
__HAL_RCC_CRYP_CLK_DISABLE
__HAL_RCC_HASH_CLK_DISABLE
AHB2 Force Release Reset
__HAL_RCC_DCMI_FORCE_RESET
__HAL_RCC_DCMI_RELEASE_RESET
__HAL_RCC_CRYP_FORCE_RESET
__HAL_RCC_HASH_FORCE_RESET
__HAL_RCC_CRYP_RELEASE_RESET
__HAL_RCC_HASH_RELEASE_RESET
AHB2 Peripheral Low Power Enable Disable
__HAL_RCC_DCMI_CLK_SLEEP_ENABLE
__HAL_RCC_DCMI_CLK_SLEEP_DISABLE
__HAL_RCC_CRYP_CLK_SLEEP_ENABLE