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YOKOGAWA DLM4000 Series User Manual

YOKOGAWA DLM4000 Series
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2-55
IM DLM4038-02EN
Setting the Clock Source (Clock)
Press the Clock soft key to display one of the menus shown below. The menu that is displayed varies
depending on the specified clock source.
When the Clock Source Is a
Channel from CH1 to CH8
*
When the Clock Source Is
LOGIC(L) or LOGIC(A|B)
*
Set the clock source (CH1 to CH8). Set the SCL source (LOGIC(L) or
LOGIC(A|B)).
Set the level used to detect clock
source states.
Set the level used to detect clock
source states.
Set the trigger coupling, HF rejection,
and noise rejection.
► section 2.3
Set the polarity ( , ).
Set the polarity ( , ).
* You can select CH8 or LOGIC(L), depending on which channel
ʼs corresponding key (CH8 or L) is illuminated.
LOGIC(A|B), A0 to A7, and B0 to B7 are available on models with the /L16 option.
Set the source bit (L0 to L7,
A0 to A7, B0 to B7).
*
Setting the Data1 Source (Data1)
Press the Data1 soft key to display one of the menus shown below. The menu that is displayed varies
depending on the specified data source.
When the Data1 Source Is a
Channel from CH1 to CH8
When the Data1 Source
Is LOGIC(L)
Set the Data1 source.
When the clock source is a channel
from CH1 to CH4, set the source to
CH1 to CH4.
When the clock source is a channel
from CH5 to CH8 or LOGIC(L), set
the source to CH5 to CH8.
Set the Data1 source (LOGIC(L)).
Selectable only when the clock source
is set to CH5 to CH7 or LOGIC(L).
Set the level used to detect data1
source states.
Set the source bit (L0 to L7).
Set the level used to detect data1
source states.
Set the trigger coupling, HF rejection,
and noise rejection.
► section 2.3
* You can select CH8 or LOGIC(L), depending on which channelʼs corresponding key (CH8 or L) is illuminated.
2.17 Triggering on SPI Bus Signals (Option)

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YOKOGAWA DLM4000 Series Specifications

General IconGeneral
BrandYOKOGAWA
ModelDLM4000 Series
CategoryTest Equipment
LanguageEnglish

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