Lockstep / Sparing mode (4 sockets w/ each 2 mem. boards), performance
oriented
Figure 121: Lockstep / Sparing mode (4 sockets w/ each 2 mem. boards), performance
oriented
CPU CPU1 CPU2 CPU3 CPU4
MEM
Riser
MEM1 MEM2
(*1)
MEM3 MEM4
(*1)
MEM5 MEM6
(*1)
MEM7 MEM8
(*1)
A1
A2
A3
B1
B2
B3
A1
A2
A3
B1
B2
B3
A1
A2
A3
B1
B2
B3
A1
A2
A3
B1
B2
B3
A1
A2
A3
B1
B2
B3
A1
A2
A3
B1
B2
B3
A1
A2
A3
B1
B2
B3
A1
A2
A3
B1
B2
B3
C1
C2
C3
D1
D2
D3
C1
C2
C3
D1
D2
D3
C1
C2
C3
D1
D2
D3
C1
C2
C3
D1
D2
D3
C1
C2
C3
D1
D2
D3
C1
C2
C3
D1
D2
D3
C1
C2
C3
D1
D2
D3
C1
C2
C3
D1
D2
D3
DIMMs Quad CPU configuration
(if all modules are of the same capacity)
8 1 1 1 1
16 1 1 1 1 1 1 1 1
24 1 1 1 1 1 1 1 1 1 1 1 1
32 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
40 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
48 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
56 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
64 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
72 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
80 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
88 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
96 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
DIMMs Quad CPU configuration
(if modules are of different capacities)
Quad CPU configuration
(if modules are of different capacities)
Quad CPU configuration
(if modules are of different capacities)
Quad CPU configuration
(if modules are of different capacities)
8 1 1 1 1 2 2 2 2 3 3 3 3 4 4 4 4
16 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3 3 4 4 4 4 4 4 4 4
24 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 4 4 4 4